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JEDEC standard 1.35V (1.28V ~ 1.45V) and
1.5V (1.425V ~1.575V) Power Supply
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VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
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800MHz fCK for 1600Mb/sec/pin
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8 independent internal bank
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Programmable CAS Latency: 11, 10, 9, 8, 7, 6, 5
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Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
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8-bit pre-fetch
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Burst Length: 8 (Interleave without any limit, sequential with starting
address “000” only), 4 with tCCD = 4 which does not allow seamless
read or write [either on the fly using A12 or MRS]
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Bi-directional Differential Data Strobe
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Internal(self) calibration : Internal self calibration through ZQ pin
(RZQ : 240 ohm ± 1%)
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On Die Termination using ODT pin
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Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at
85°C < TCASE
≤
95°C
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Asynchronous Reset
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PCB: Height1.18” (30mm), double sided component
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Lead Free RoHS Compliant